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(Image credit: Hot Chips 33 / AMD)
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AMD 3D V-Cache

(Image credit: Hot Chips 33 / AMD)
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AMD 3D V-Cache

(Image credit: Hot Chips 33 / AMD)

AMD’s 3D V-Cache marks the company’s first foray into 3D packaging, and the company shared more details behind its manufacturing process during its presentation at Hot Chips 33. As a quick refresher, 3D V-Cache uses a novel new hybrid bonding technique that fuses an additional 64MB of 7nm SRAM cache stacked vertically atop the Ryzen compute chiplets to triple the amount of L3 cache per Ryzen chip. 

This new tech can yield up to an amazing 192MB of L3 cache per chip, and AMD has demoed a Ryzen 9 5900X gaining 15% more performance in 1080p gaming with the new cache, which is roughly the amount of performance we could expect from a new CPU microarchitecture and/or process node. However, AMD accomplished this feat with the same 7nm node and Zen 3 architecture that already ships with its standard Ryzen 5000 models. This advance also comes with a single die stacked atop the chip — AMD says it can stack more than one layer in the future, which would boost capacity even further.

AMD divulged after the presentation that it can accomplish similar yields with the new 3D V-Cache chips as it does with standard Ryzen models, meaning it has already jumped the hurdles required to bring the chips, which enter production at the end of the year, to market. 

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AMD

(Image credit: Hot Chips 33 / AMD)
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AMD

(Image credit: Hot Chips 33 / AMD)

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